DisplayID
DisplayID is a VESA standard for metadata describing display device capabilities to the video source. It is designed to replace E-EDID standard and EDID structure v1.4.
The DisplayID standard was initially released in December 2007. Version 1.1 was released in March 2009 and was followed by version 1.2 released in August 2011. Version 1.3 was released in June 2013 and current version 2.0 was released in September 2017.
DisplayID uses variable-length structures of up to 256 bytes each, which encompass all existing EDID extensions as well as new extensions for 3D displays, embedded displays, Wide Color Gamut and HDR EOTF. DisplayID format includes several blocks which describe logical parts of the display such as video interfaces, display device technology, timing details and manufacturer information. Data blocks are identified with a unique tag. The length of each block can be variable or fixed to a specific number of bytes. Only the base data block is mandatory, while all extension blocks are optional. This variable structure is based on CEA EDID Extension Block Version 3 first defined in CEA-861-B.
The DisplayID standard is freely available and is royalty-free to implement.
DisplayID 2.0 structures
Version 2.0 introduces new generalized information blocks primarily intended for UltraHD High Dynamic Range (HDR) displays, such as LCD computer monitors and LCD/OLED televisions with native support for BT.2100 color space and PQ/HLG transfer functions. It also makes optional predefined CRT/LCD timings from DMT and CEA-861 standards, switching to formula-based structures which follow VESA CVT-RB and GTF.
The base DisplayID 2.0 variable-length structure is the same for all data blocks:
Each data block starts with mandatory block tag, revision number (0-7), and payload length (0-248) bytes, and has a variable length of up to 251 bytes. The following blocks are currently defined:
0x20 Product identification
0x20
Product identification block contains standard vendor and product IDs, serial number, date of manufacture and product name.
Comparing to legacy block 0x00
, Microsoft ISA Plug&Play identifier is replaced with IEEE OUI, first used in the network MAC address.
0x21 Display parameters
0x21
Display parameters block contains basic parameters such as viewable area size and pixel count, supported color depth, and factory calibrated RGB color space, white point, luminance, and gamma transfer function.
Comparing to legacy block 0x01
, color calibration values have been moved here from block 0x02
and max/min luminance values have been added. Display size can be specified in 1 mm increments in addition to default 0.1 mm.
0x22 Type VII detailed timings
0x22
Detailed timing block type VII defines CTA-861 compatible timings based on pixel rate. This block is based on type VI block 0x13
.
0x23 Type VIII enumerated timing code
0x23
Type VIII enumerated timing code block is based on type IV DMT ID block 0x06
. It provides one-byte or two-byte video mode codes as defined in VESA Display Monitor Timings standard or Video Information Codes defined by CTA-861 and HDMI.
0x24 Type IX formula-based timings
0x24
Type IX formula-based timings block is based on type V short timings block 0x11
.
0x25 Dynamic video timing range
0x25
Dynamic video timing range block is based on block 0x9h
Video Timing Range Limits; the new version allows more precise definition of pixel rate in 1 kHz steps and adds indication for variable refresh rates.
0x26 Display interface features
0x26
Display interface features block describes color depth, dynamic range, and transfer function supported by the display controller. It is based on blocks 0x0F
display interface features and 0x02
color characteristics.
0x27 Stereo display interface
0x27
Stereo display interface block is based on block 0x10
and describes stereoscopic 3D/VR modes (i.e. timings codes and stereo frame formats) supported by the display.
0x28 Tiled display topology
0x28
Tiled display topology block describes displays that consist of multiple physical display panels, each driven by a separate video interface. It is based on block 0x12
.
0x29 Container ID
0x29
Container ID block defines a unique identifier used to associate additional devices that may be present in a multifunctional display.
0x7E Vendor-specific data
0x7E
Vendor-specific data includes proprietary parameters which are not supported by DisplayID 2.0 structures.
0x81 CTA DisplayID
0x81
CTA DisplayID block provides information on CTA-861 EDID timings.
DisplayID 1.3 structures
Version 1.3 information blocks 0x10-0x1F borrow heavily from EDID 1.4 standard, which was designed for previous generation CRT/LCD/DLP/PDP displays.
The following block types are defined:
Note: where indicated, only the difference from similar/superseding structures in Version 2.0 are shown in the sections below.
0x00 Product identification
0x00
Product identification – superseded by 0x20
. The difference is:
0x01 Display parameters
0x01
Display parameters – superseded by 0x21
. The differences are:
0x02 Color characteristics
0x02
Color characteristics – superseded by 0x21
Display parameters.
0x03 Type I detailed timings
0x03
Type I detailed timings – superseded by 0x22
type VII detailed timings. The differences are:
0x04 Type II detailed timings
0x04
Type II detailed timings block provides a compressed structure with less precise pixel coordinates and reduced blank intervals comparing to Type I:
0x05 Type III short timings
0x05
Type III short timings block provides a very short compressed structure which uses formula-based CVT timings.
0x06 Type IV short timings
0x06
Type IV short timing (DMT ID code) block uses video mode codes defined in VESA display monitor timings standard, as well as video information codes defined by CTA-861 and HDMI. Superseded by 0x23
enumerated timing.
0x11 Type V short timings
0x11
Type V short timings block is based on Type III short timings block 0x05, but provides greater pixel precision and only supports CVT-RB. Superseded by 0x24
Type IX formula-based timings.
0x13 Type VI detailed timing
0x13
Type VI Detailed timing block supports higher precision pixel clock and high-resolution timings. This block is based on Type I block 0x03, but allows greater timings precision using 1 kHz steps instead of 10 kHz. Superseded by 0x22
Type VII Detailed timings.
0x09 Video timing range limits
0x09
Video timing range limits block describes displays capable of variable timings. Superseded by 0x25
Dynamic video timings range.
0x0C Display device data
0x0C
Display device data block provides information about display panel characteristics for embedded applications, such as display technology, panel type, and pixel response times.
0x0F Display interface data
Display interface features block – superseded by 0x26
Display Interface Features.
Additional blocks
Data blocks not described above are:
0x0A
Serial number data block provides product serial number as an ASCII string.
0x0B
General-purpose ASCII string block provides general purpose text strings that may be required by specific applications.
0xD0
Interface power sequencing block defines display interface signal timings required for entering and exiting sleep mode.
0x0E
Transfer characteristics block defines detailed gamma curves according to VESA display transfer characteristic data block (DTCDB) standard, as may be required by byte 1 in 0x02
color characteristics block.
0x10
Stereo display interface block describes stereoscopic 3D/VR modes – superseded by 0x27
Ssereo display interface.
0x12
Tiled display topology data block defines multi-panel displays – superseded by 0x28
tiled display topology.
0x7F
Vendor specific block defines proprietary vendor data.