Sandy Bridge

Sandy Bridge is the codename for Intel's 32 nm microarchitecture used in the second generation of the Intel Core processors (Core i7, i5, i3). The Sandy Bridge microarchitecture is the successor to Nehalem and Westmere microarchitecture. Intel demonstrated an A1 stepping Sandy Bridge processor in 2009 during Intel Developer Forum (IDF), and released first products based on the architecture in January 2011 under the Core brand.

Sandy Bridge is manufactured in the 32 nm process and has a soldered contact with the die and IHS (Integrated Heat Spreader), while Intel's subsequent generation Ivy Bridge uses a 22 nm die shrink and a TIM (Thermal Interface Material) between the die and the IHS.

Intel demonstrated a Sandy Bridge processor with A1 stepping at 2 GHz during the Intel Developer Forum in September 2009.

Upgraded features from Nehalem include:

• Intel Turbo Boost 2.0
• 32 KB data + 32 KB instruction L1 cache and 256 KB L2 cache per core
• Shared L3 cache which includes the processor graphics (LGA 1155)
• 64-byte cache line size
• New μOP cache, up to 1536-entry
• Improved 3 integer ALU, 2 vector ALU and 2 AGU per core
• Two load/store operations per CPU cycle for each memory channel
• Decoded micro-operation cache, and enlarged, optimized branch predictor
• Sandy Bridge retains the four branch predictors found in Nehalem: the branch target buffer (BTB), indirect branch target array, loop detector and renamed return stack buffer (RSB). Sandy Bridge has a single BTB that holds twice as many branch targets as the L1 and L2 BTBs in Nehalem.
• Improved performance for transcendental mathematics, AES encryption (AES instruction set), and SHA-1 hashing
• 256-bit/cycle ring bus interconnect between cores, graphics, cache and System Agent Domain
• Advanced Vector Extensions (AVX) 256-bit instruction set with wider vectors, new extensible syntax and rich functionality
• Up to 8 physical cores, or 16 logical cores through hyper-threading (From 6 core/12 thread)
• Integration of the GMCH (integrated graphics and memory controller) and processor into a single die inside the processor package. In contrast, Sandy Bridge's predecessor, Clarkdale, has two separate dies (one for GMCH, one for processor) within the processor package. This tighter integration reduces memory latency even more.
• A 14- to 19-stage instruction pipeline, depending on the micro-operation cache hit or miss
• Increased ROB to 168 entries (From 128)
• Larger Scheduler buffer (54-entry, up from 26-entry)

All translation lookaside buffers (TLBs) are 4-way associative.

• Intel Quick Sync Video, hardware support for video encoding and decoding
• Integrated graphics is now integrated on the same die

• Integrated PCIe Controller

All Sandy Bridge processors with one, two, or four cores report the same CPUID model 0206A7h and are closely related. The stepping number cannot be seen from the CPUID but only from the PCI configuration space. The later Sandy Bridge-E processors with up to eight cores and no graphics are using CPUIDs 0206D6h and 0206D7h. Ivy Bridge CPUs all have CPUID 0306A9h to date, and are built in four different configurations differing in the number of cores, L3 cache and GPU execution units:

• The average performance increase, according to IXBT Labs and Semi Accurate as well as many other benchmarking sites, at clock to clock is 11.3% compared to the Nehalem generation, which includes Bloomfield, Clarkdale, and Lynnfield processors.
• Around twice the integrated graphics performance compared to Clarkdale's (12 EUs comparison).

¹Processors featuring Intel's HD 3000 graphics are set in bold. Other processors feature HD 2000 graphics, HD graphics (Pentium and Celeron models) or no graphics core (Graphics Clock rate indicated by N/A).

• This list may not contain all the Sandy Bridge processors released by Intel. A more complete listing can be found on Intel's website.

Suffixes to denote:

• K – Unlocked (adjustable CPU ratio up to 57 bins)
• P – Versions clocked slightly higher than similar models, but with onboard-graphics deactivated
• S – Performance-optimized lifestyle (low power with 65W TDP)
• T – Power-optimized lifestyle (ultra low power with 35-45W TDP)
• X – Extreme performance and unlocked (adjustable CPU ratio with no ratio limit)
• C – Embedded/Communications - BGA packaging

NOTE: 3970X, 3960X, 3930K, and 3820 are actually of Sandy Bridge-E edition.

All 1600/2600/4600-series models:

• support 40 PCI Express 3.0 lanes
• support DMI 2.0
• support LGA 2011 as a socket with varying scalabilities

Suffixes to denote:

• L – Low power
• W – Optimized for workstations

• Core i5-2515E and Core i7-2715QE processors have support for ECC memory and PCI express port bifurcation.
• All mobile processors, except Celeron and Pentium, use the HD 3000 (12 EUs) iGPU.

Suffixes to denote:

• M – Mobile processors
  • UM – Ultra low power mobile (dual-core)
  • LM – Low power mobile (dual-core)
  • M – Dual-core mobile
  • QM – Quad-core mobile
  • XM – Quad-core extreme mobile (unlocked clock multiplier)
• E – Embedded mobile processors
  • QE – Quad-core
  • LE – Low power
  • UE – Ultra low power

On 31 January 2011, Intel issued a recall on all 67-series motherboards due to a flaw in the Cougar Point Chipset. A hardware problem exists, in which the chipset's SATA II ports may fail over time, causing failure of connection to SATA devices, though data is not at risk. Intel claims that this problem will affect only 5% of users over 3 years; however, heavier I/O workloads can exacerbate the problem. This hardware bug cannot be fixed by BIOS update.

Intel stopped production of flawed B2 stepping chipsets and began producing B3 stepping chipsets with the silicon fix. Shipping of these new chipsets started on 14 February 2011 and Intel estimated full recovery volume in April 2011. Motherboard manufacturers (such as ASUS and Gigabyte Technology) and computer manufacturers (such as Dell and Hewlett-Packard) stopped selling products that involved the flawed chipset and offered support for affected customers. Options ranged from swapping for B3 motherboards to product refunds.

Sandy Bridge processor sales were temporarily on hold, as one cannot use the CPU without a motherboard. However, processor release dates were not affected. After two weeks, Intel continued shipping some chipsets, but manufacturers had to agree to a set of terms that will prevent customers from encountering the bug.

With Sandy Bridge, Intel has tied the speed of every bus (USB, SATA, PCI, PCIe, CPU cores, Uncore, memory etc.) to a single internal clock generator issuing the basic 100 MHz Base Clock (BClk). With CPUs being multiplier locked, the only way to overclock is to increase the BClk, which can be raised by only 5–7% without other hardware components failing. As a work around, Intel made available K/X-series processors, which feature unlocked multipliers; with a multiplier cap of 57 for Sandy Bridge. For the Sandy Bridge-E platform, there is alternative method known as the BClk ratio overclock.

During IDF (Intel Developer Forum) 2010, Intel demonstrated an unknown Sandy Bridge CPU running stably overclocked at 4.9 GHz on air cooling.

Non-K edition CPUs can overclock up to four bins from its turbo multiplier.

Sandy and Ivy Bridge processors with vPro capability have security features that can remotely disable a PC or erase information from hard drives. This can be useful in the case of a lost or stolen PC. The commands can be received through 3G signals, Ethernet, or Internet connections. AES encryption acceleration will be available, which can be useful for video conferencing and VoIP applications.

Sandy and Ivy Bridge processors contain a DRM technology that some video streaming web sites rely on to restrict use of their content. Such web sites offer 1080p streaming to users with such CPUs and downgrade the quality for other users.

With the introduction of the Sandy Bridge microarchitecture, Intel also introduced the Intel Data Plane Development Kit (Intel DPDK) to help developers of communications applications take advantage of the platform in packet processing applications, and network processors.

Intel demonstrated the Haswell architecture in September 2011, released in 2013 as the successor to Sandy Bridge and Ivy Bridge.

In 2015, Microsoft released a microcode update for selected Sandy Bridge and Ivy Bridge CPUs for Windows 7 and up that addresses stability issues. However, the update negatively impacts Pentium G3258 and Core i3-4010U CPU models.

• List of Intel CPU microarchitectures
• List of Macintosh models grouped by CPU type

• Marco Chiappetta (January 2, 2011). "Intel Core i7-2600K and i5-2500K Processors Debut". HotHardware.com. Retrieved January 2, 2011.
• David Kanter (September 25, 2010). "Intel's Sandy Bridge Microarchitecture". realworldtech.com. Retrieved December 16, 2010.
• David Kanter (August 8, 2011). "Intel's Sandy Bridge Graphics Architecture". realworldtech.com. Retrieved November 4, 2011.
• Gabriel Torres (December 30, 2010). "Inside the Intel Sandy Bridge Microarchitecture". hardwaresecrets.com. Archived from the original on September 28, 2011. Retrieved January 16, 2011.
• Andrew Van Til (January 3, 2011). "Intel Sandy Bridge: Core i5-2500K and DH67BL Motherboard". www.missingremote.com. Retrieved January 3, 2011.
• Oded Lempel (July 28, 2013). "2nd Generation Intel Core Processor Family: Intel Core i7, i5 and i3" (PDF). www.hotchips.org. Retrieved January 21, 2014.

• Official Intel homepages for:
  • Sandy Bridge
  • Sandy Bridge-E
  • Sandy Bridge-EN
  • Sandy Bridge-EP
• Intel's AVX page (Fetched Oct 9, 2012)