Physical address

Diagram of relationship between the virtual and physical address spaces

In computing, a physical address is the numerical address used by the memory system to select a location in physical memory or a register in a memory-mapped I/O device. In a system with virtual memory, it is the address produced after the memory management unit (MMU) translates a virtual or linear address. Page translation replaces the page-number portion of the virtual address with a physical page-frame number while preserving the offset within the page.

Use by central processing unit

In a computer supporting virtual memory, the term physical address is used mostly to differentiate from a virtual address. In particular, in computers utilizing a memory management unit (MMU) to translate memory addresses, the virtual and physical addresses refer to an address before and after translation performed by the MMU, respectively.

Unaligned addressing

Depending upon its underlying computer architecture, the performance of a computer may be hindered by unaligned access to memory. For example, a 16-bit computer with a 16-bit memory data bus, such as Intel 8086, generally has less overhead if the access is aligned to an even address. In that case fetching one 16-bit value requires a single memory read operation, a single transfer over a data bus.

If the 16-bit data value starts at an odd address, the processor may need to perform two memory read cycles to load the value into it, i.e. one for the low address (throwing away half of it) and then a second read cycle to load the high address (throwing away again half of the retrieved data). On some processors, such as the Motorola 68000 and Motorola 68010 processors, and SPARC processors, unaligned memory accesses will result in an exception being raised (usually resulting in a software exception, such as POSIX's SIGBUS, being raised).

Use by other devices

Devices that perform direct memory access (DMA) issue addresses to read or write main memory without the CPU copying each item of data. The address visible to a device may be a bus address rather than the CPU's physical address. An input–output memory management unit (IOMMU) can translate device-visible DMA addresses to physical memory addresses, providing remapping and isolation analogous to an MMU for processor accesses.

Memory-mapped I/O registers also occupy physical address ranges. Operating systems map those ranges for device drivers while preventing ordinary applications from accessing them directly.

See also

References

  1. ↑ "Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A: System Programming Guide, Part 1" (PDF). Intel. section 4.3. Retrieved 15 October 2026.
  2. ↑ Frank Uyeda (2009). "Lecture 7: Memory Management" (PDF). CSE 120: Principles of Operating Systems. UC San Diego. Retrieved 2013-12-04.
  3. 1 2 Daniel Drake (2007-12-04). "Memory access and alignments". LWN.net. Retrieved 2013-12-04.
  4. ↑ Daniel Drake; Johannes Berg. "Documentation/unaligned-memory-access.txt". kernel.org. Retrieved 2013-12-04.
  5. ↑ "Dynamic DMA mapping Guide". The Linux Kernel documentation. Linux kernel community. Retrieved 15 October 2026.