Zen 6

AMD Zen 6
General information
LaunchingDatacenter Q4 2026
Desktop H1 2027 (expected)
Designed byAMD
Common manufacturer
CPUID codeFamily 1Ah
Physical specifications
Cores
  • Mobile: up to 26
    Desktop: up to 24
    HEDT: 36 to 144
    Server: 8 to 256
Memory (RAM)
Sockets
Cache
L1 cache80 KB (per core):
  • 32 KB instructions
  • 48 KB data
L2 cache1 MB (per core)
L3 cache48 MB (per CCD)
128 MB (per CCD on Venice-X)
Architecture and classification
Technology nodeTSMC N2P (CCD) to TSMC N6 (IOD)
MicroarchitectureZen
Instruction setAMD64 (x86-64)
Extensions
Products, models, variants
Core names
  • Zen 6
    • Morpheus
  • Zen 6c
    • Monarch
  • Zen 6 LP
    • TBD
Product code names
  • Desktop
    • Olympic Ridge
    • Medusa Point
  • Server
    • Venice
    • Venice-X
    • Venice LP
    • Verano
  • HEDT/Workstation
    • Mustang Peak
  • Mobile
    • Bumblebee
    • Medusa Point
    • Medusa Halo
    • Gator Range
Brand names
History
PredecessorZen 5
SuccessorZen 7
Support status
Unreleased

Zen 6 ("Morpheus") is the name for an upcoming CPU microarchitecture from AMD, shown on their roadmap in July 2024. It is the successor to Zen 5 and is believed to use TSMC's 6 nm and 2 nm processes. Desktop processors will be codenamed "Olympic Ridge", expected to be released under the Ryzen 10000 name, the Ryzen Threadripper (HEDT or Workstation) processors are codenamed "Mustang Peak", while Epyc server processors will be codenamed "Venice", "Venice-X", "Venice LP" & "Verano". The mobile processors include several lineup codenames: "Bumblebee" at the low-end, "Medusa Point" for the mainstream lineup, "Medusa Halo" represents a high-end APU with a large iGPU, and "Gator Range" providing the highest mobile performance.[citation needed]

Zen 6 is expected to release in late 2026 to early 2027. It is expected that each Core Complex Die (CCD) will contain up to 12 cores each, enabling a maximum of 24 cores (48 threads) for consumer platform chips and 256 cores (512 threads) on server platform chips.

The architecture is confirmed to introduce new instruction extensions, including AVX512_BMM, AVX_NE_CONVERT, AVX_IFMA, AVX_VNNI_INT8, and AVX512_FP16. It is also expected that Zen 6 will be the first platform supporting Flexible Return and Event Delivery (FRED).

Zen 6c

Like with the previous two Zen generations, Zen 6 will come in a standard variant, as well as a high-core-density variant named Zen 6c ("Monarch"). Each CCD will hold up to 32 cores. This will be used for server chips, and is speculated to also be for mobile platforms.

Zen 6 LP

A new variant is set to debut, named Zen 6 LP. This variant is similar in function to Intel's LP-E cores in processors such as Meteor Lake and Panther Lake, handling background tasks along with maintaining hybrid sleep. However, unlike Intel's Darkmont, Zen 6 LP will be a more condensed and underclocked form of Zen 6c, and as such will retain the same IPC, instruction sets, and extensions as Zen 6 and Zen 6c.[citation needed] The Zen 6 LP variant will be present in mobile chips and system on a chip (SoCs), handheld Accelerated Processing Units (APUs), the upcoming PlayStation 6 console's SoC, upcoming PlayStation 6 handheld's SoC and upcoming Xbox console's SoC.[failed verification]

Products

Server

Venice

The Epyc 9006 series of high-performance server processors using Zen 6, codenamed Venice, were also announced at AMD Accelerating AI event on July 23, 2026. Venice and Venice X both use SP7 or SP8 sockets depending on the model of processor, and packs up to 96 cores and 192 threads on the top-end model. Venice is built on a TSMC 3 nm process[citation needed].

Common features of EPYC 9006 server processers:

Branding and Model Cores
(threads)		 Clock rate (GHz) L3 cache
(total)		 TDP Chiplets Core
config		 Socket Release
date		 Launch
price
Base Boost
Epyc 9G76 96 (192) 3.4 4.8 384 MB 500 W 8 × CCD
2 × I/OD		 8 × 12 SP7 TBA TBA
9686F 5.0
9556 64 (128) 2.75 4.3 300 W 8 × 8
9586F 3.75 5.0 500 W
9576F 3.55 400 W SP8
9476F 48 (96) 3.65 5.0 192 MB 330 W 4 × CCD
2 × I/OD		 4 × 12
9016 8 (16) 3.05 4.8 48 MB 130 W 1 × CCD
1 × I/OD		 1 × 8
  1. ↑ Core Complexes (CCX) × cores per CCX

Venice-X

A variant of Epyc 9006 using Zen 6c was also announced at AMD Accelerating AI event, codenamed Venice-X. It features a maximum of 256 cores and 512 threads, 128 MB of L3 cache, and is manufactured on a 2 nm process.

Common features of EPYC Dense 9006 server processers:

Branding and Model Cores
(threads)		 Clock rate (GHz) L3 cache
(total)		 TDP Chiplets Core
config		 Socket Release
date		 Launch
price
Base Boost
Epyc 9996 256 (512) 2.55 4.1 1024 MB 600 W 8 × CCD
2 × I/OD		 8 × 32 SP7 TBA TBA
9966 192 (384) 2.9 4.0 768 MB 6 × CCD
2 × I/OD		 6 × 32
9846 168 (336) 2.85 3.7 500 W 6 × 28
9756 128 (256) 3.15 4.0 512 MB 4 × CCD
2 × I/OD		 4 × 32
9746 2.9 400 W SP8
9656 96 (192) 3.05 3.7 4 × 24 SP7
  1. ↑ Core Complexes (CCX) × cores per CCX

See also

References

  1. 1 2 Roach, Jake (July 23, 2026). "AMD's 256-core Epyc 9996 'Venice' claims up to a 3.4x jump over Intel Xeon competition, 20% over Nvidia Vera – Zen 6 comes with up to 1024MB of L3, 16-channel memory, and 5GHz+ clock speeds". Tomshardware. Future plc. Retrieved July 25, 2026.
  2. 1 2 3 Anton, Shilov (March 23, 2026). "AMD's Enterprise CPU and GPU roadmap: Venice, Verano, Zen 6, Helios, and CDNA". Tom's Hardware. Archived from the original on May 31, 2026. Retrieved June 3, 2026.
  3. ↑ Bashir, Samir (February 4, 2026). "AMD Zen 6: More cores, more cache, hardly any more surface area". igor'sLAB. Archived from the original on February 13, 2026. Retrieved February 13, 2026.
  4. 1 2 3 Hagedoorn, Hilbert (July 16, 2024). "Ryzen 10000 "Medusa" with Zen 6 "Morpheus" in development". www.guru3d.com. Archived from the original on February 13, 2025. Retrieved August 24, 2024.
  5. ↑ Williams, Wayne (July 21, 2024). "AMD confirms Zen 6 and Zen 6c will arrive in 2025 — but Intel is set to grab the fastest CPU server spot for the first time in a decade within weeks". TechRadar. Archived from the original on August 24, 2024. Retrieved August 24, 2024.
  6. ↑ "AMD CPU roadmap now lists Zen 6 architecture, development of Zen 7 underway". VideoCardz.com. July 16, 2024. Archived from the original on July 18, 2024. Retrieved August 24, 2024.
  7. ↑ Larabel, Michael (September 5, 2024). "AMD Reveals Latest Plans For Open-Source openSIL With Replacing AGESA, Zen 6 Milestone". Phoronix. Archived from the original on September 6, 2024. Retrieved September 6, 2024.
  8. ↑ Wallossek, Igor (November 9, 2024). "AMD's Zen 6 "Medusa" Ryzen CPUs: AM5 support confirmed, market launch planned for the end of 2026". igor´sLAB. Archived from the original on December 22, 2024. Retrieved January 19, 2025.
  9. ↑ AleksandarK (February 19, 2026). "AMD Ryzen 10000 "Olympic Ridge" to Debut with 6/8/10/12/16/20/24-Core "Zen 6" SKUs". TechPowerUp. Archived from the original on March 3, 2026. Retrieved March 3, 2026.
  10. ↑ Larabel, Michael (November 8, 2025). "AMD Sends Out Initial GNU Binutils Patch For AMD Zen 6 - Confirms New AVX-512 Features". Phoronix. Archived from the original on November 25, 2025. Retrieved November 26, 2025.
  11. ↑ Ferreira, Bruno (February 2, 2026). "AMD adopts FRED together with Intel for Zen 6 architecture — replacement for decades-old IDT can improve performance and stability". Tom's Hardware. Archived from the original on March 3, 2026. Retrieved June 1, 2026.
  12. ↑ "AMD Backs Up PS6 Portable Rumors With "Zen 6 LP" Core Support in Linux". TechPowerUp. July 1, 2026. Archived from the original on July 5, 2026. Retrieved July 5, 2026.